Package Design Engineer

Our client is a leading maker of ICs and Modules for Mobile, 5G, and Data Center Networking applications.

They are currently seeking a Package Design Engineer who has experience designing and engineering complex flip-chip BGA packages, along with automating the design work with Cadence SKILL programming for Allegro. The automation will be used by the company’s design team to improve everyone’s productivity. Experience with ASIC and/or high-speed SerDes Package Design is highly preferred. The ideal candidate will be a BS (or better) in Mechanical, Electrical, Chemical, or Computer Engineering with 2-5 years, or more in either IC Package Design OR Design Automation for IC Packaging. The candidate MUST have a desire to run design automation for IC Packaging. Should also have basic knowledge of Signal Integrity, Power Integrity, and/or crosstalk. We also need someone who has good people skills and who can be cross-functional as you will be interacting with a group of different types of engineers.